Field of the Invention
The invention relates to an output driver circuit of an integrated circuit having an input terminal for receiving an input signal, at least one output terminal for outputting an output signal, and also a multiplicity of driver stages. Each driver stage has a driver circuit and a driver activation configuration and an activation signal of the driver activation configuration activating the driver circuit. The invention also pertains to a differential output driver circuit with two of the aforementioned output drivers.
Output driver circuits are used for driving the module connections (pins) in integrated circuits. On account of continually increasing operating frequencies of integrated, digital circuits, the rise and fall times of the control signals which activate the output driver circuits are becoming shorter and shorter. As a result of the high switching frequencies of the digital circuit sections, high-frequency current pulses occur on the supply lines. Particularly in the case of output driver circuits which have to supply high currents for driving inductive, resistive or capacitive loads, these undesirable current pulses on the supply lines can reach considerable values and thus interfere with the functioning of other circuit sections. In the case of inductive loads, moreover, abrupt changes in the current profile produce high voltage amplitudes which can electromagnetically undesirably influence the functioning of other circuit sections.
In order to reduce such interference, attempts are made, in the context of switching output driver circuits, to reduce abrupt changes in the current profile of the output driver circuits and also current pulses on the supply lines. For this purpose, it is known for the large driver transistors of an output driver circuit with the associated activation configurations to be divided into chains of smaller driver transistors, so-called driver stages, and for the individual driver stages of the chain to be activated in a manner staggered over time. As a result, although the rise times of the output signals are lengthened, current pulses and induced interference voltages are reduced.
European patent EP 0 340 731 B1 describes an output driver circuit in which a multiplicity of driver stages are connected in parallel and are activated in a manner staggered over time by RC elements connected upstream of the driver stages. The RC elements are formed by resistors connected upstream of the driver transistors and the gate-source capacitance of the individual driver transistors. In this case, each driver transistor is assigned a specific delay time, which can be set through different values of R or C. However, the realization of resistors on integrated circuits has the disadvantage that the area requirement is high and the absolute value of the resistor is poorly adjustable.
U.S. Pat. No. 4,992,676 discloses an output driver circuit in which the individual driver stages are connected up to form a chain. In that case, each driver stage of the chain is respectively activated by a preceding driver stage. In this case, a delay is effected by the signal propagation time through the respective stage preceding a stage. However, the switching-off of the output driver circuit is effected in parallel and simultaneously for all the driver stages and thus leads to an abrupt change in the current profile and, for example in the case of a connected inductor, to an induced interference voltage.
A further output driver circuit, in which an RC element is provided between a first and a second driver stage in order to reduce current and voltage spikes during changeover operations, is disclosed in U.S. Pat. No. 5,355,029. In this case, however, the switching-off of the driver transistors is likewise effected in parallel and simultaneously, as a result of which the above-described disadvantages during the switching-off process are not eliminated.
It is accordingly an object of the invention to provide an output driver circuit, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which provides a time delay between the driver stages both during the switching-on and during the switching-off of the driver transistors.
With the foregoing and other objects in view there is provided, in accordance with the invention, an output driver circuit of an integrated circuit, comprising: an input terminal for receiving an input signal; at least one output terminal for outputting an output signal; and
a multiplicity of driver stages each having a driver circuit and a driver activation configuration outputting an activation signal for activating the driver circuit;
each the driver activation configuration having a first input and a second input respectively activated in dependence on a changeover signal;
the driver activation configurations being cascaded in series with a first driver activation configuration and a last driver activation configuration, wherein, proceeding from the first driver activation configuration, the activation signal of each the driver activation configuration is fed to the first input of each subsequent the driver activation configuration and, proceeding from the last driver activation configuration, the output signal of each the driver activation configuration is fed to the second input of each preceding the driver activation configuration;
a control device connected to and transmitting the changeover signal to each driver activation configuration via a changeover line;
an input line connected to the control device, the first input of the first driver activation configuration and the second input of the last driver activation configuration being connected to the control device via the input line, the input line carrying a delayed input signal by comparison with the input terminal; and
the control device changing over between the first and second inputs of each the driver activation configuration.
In accordance with an added feature of the invention, the driver circuits are defined with different current driver capabilities. The embodiment in which the driver circuits have different current driver capabilities is particularly preferred. In this case, by way of example, the current driver capability may rise from the first up to the last driver stage. The driver circuit of the first driver stage then advantageously carries a lower current density than the driver circuit of the last driver stage. Effects such as, for example, electromigration on account of excessively high current densities in lines are thereby attenuated.
In accordance with an additional feature of the invention, each driver activation configuration has a multiplicity of switches connected in parallel, at least one inverter circuit, and at least one capacitor. The driver activation configuration in this embodiment has at least one inverter circuit and a multiplicity of switches and can be realized in a simple manner using components appertaining to digital circuitry. For the signal delay in a single driver activation configuration, at least one capacitor is provided, which serves for the signal delay in addition to the inverter circuits. The capacitors advantageously lengthen the signal propagation time through the driver activation configurations, so that it is possible to lengthen the rise and fall time in the voltage and current profile.
In accordance with another feature of the invention, the switches in the driver activation configuration are transistors.
In accordance with a further feature of the invention, each driver activation configuration has an output for additionally outputting an inverted activation signal.
In accordance with again a further feature of the invention, each driver circuit receives the activation signal and the complementary activation signal.
In accordance with a concomitant feature of the invention, which is particularly preferred, the output driver circuit is embodied in CMOS technology. What is particularly advantageous in this embodiment is that the switches of the output driver circuit can be realized by individual p-channel and n-channel MOS transistors.
One embodiment of the output driver circuit has a multiplicity of pairwise driver activation configurations and driver circuits and also a control device. In each pair, a driver activation configuration is connected to a driver circuit and the driver activation configurations are connected in series, with a driver activation configuration at the start and one at the end of the series. The control device evaluates the input signal of the output driver circuit and changes over the signal propagation direction through the series of driver activation configurations in a manner dependent on the result of the evaluation. To that end, the input signal is passed both to the first and to the last driver activation configuration. The input signal propagates from the first to the last driver stage when the output driver stage is switched on, and from the last driver stage to the first upon switch-off. On account of the signal propagation time through a single driver stage, a delay is produced during switching. As a result, in an advantageous manner, delayed switching-on and delayed switching-off of the driver stages are achieved and interference voltages induced in inductive loads and current pulses on the supply lines are reduced.
With the above and other objects in view there is also provided, in accordance with the invention, a differential output driver circuit which comprising a first and a second output driver circuit according to the above-outlined invention. The outputs of the first output driver circuit are cross-coupled to the outputs of the second output driver circuit.
This embodiment proves to be particularly advantageous for driving inductive loads such as, for example, transformers since induced voltages are reduced by delayed switching-on and switching-off of the output signals and, as a result, the output terminals of the differential output driver circuit are loaded to a lesser extent. Moreover, electromagnetic interference due to induced voltage spikes are reduced. A further advantage of the delayed switching-on and -off of the driver circuits is manifested in a reduced common-mode voltage. The setting time of transmitter and receiver is thereby reduced.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in an output driver circuit, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.